1st FAIR FEE Workshop

Name: 1st FAIR FEE Workshop
Start: 2005-10-11T13:00:00+02:00
End: 2005-10-13T12:50:00+02:00
Location: GSI, Darmstadt

Oct 11, 2005, 1:00 PM → Oct 13, 2005, 12:50 PM Europe/Berlin

GSI, Darmstadt

Haik Simon (GSI, Darmstadt), Lars Schmitt (GSI, Darmstadt), Walter F.J. Müller (GSI, Darmstadt)

Tue, October 11
- 1:00 PM → 2:00 PM
  
  Registration
- 2:00 PM → 4:00 PM
  Plenary
  - 2:00 PM
    
    Welcome 10m
    
    Speaker: Hans-Herbert Gutbrod (GSI, Darmstadt)
  - 2:10 PM
    
    The NUSTAR Facility - (NUclear STructure Astrophysics and Reactions) 20m
    
    Speaker: Haik Simon (GSI, Darmstadt)
    
    Slides
  - 2:30 PM
    
    The PANDA Experiment - High Precision Hadron Physics at FAIR 20m
    
    Speaker: Lars Schmitt (GSI, Darmstadt)
    
    Slides
  - 2:50 PM
    
    CBM Overview - FEE and DAQ Profile 20m
    
    Speaker: Walter F.J. Müller (GSI, Darmstadt)
    
    Slides
  - 3:10 PM
    
    DLL based TDCs 25m
    
    Speaker: Harald Deppe (GSI, Darmstadt)
    
    Slides
  - 3:35 PM
    
    TAC based TDC ASIC’s 25m
    
    Speaker: Holger Flemming (GSI, Darmstadt)
    
    Slides
- 4:00 PM → 4:30 PM
  
  Break 30m
- 4:30 PM → 6:00 PM
  Plenary
  - 4:30 PM
    
    An Interleaved Sampling ADC Module 25m
    
    Speaker: Alexander Mann (TU München)
    
    Slides
  - 4:55 PM
    
    Time measurements with the TDCs board 25m
    
    Speaker: Krzysztof Korcyl (Jagiellonian University, Cracow)
    
    Slides
  - 5:20 PM
    
    TDC readout prototype: test from measurements 20m
    
    Speaker: Marek Palka (University of Cracow)
    
    Slides
  - 5:40 PM
    
    The Frontend Readout System for the new HADES RPC Detector 20m
    
    Speaker: Jens Sören Lange (GSI, Darmstadt)
    
    Slides
Wed, October 12
- 9:00 AM → 10:45 AM
  Plenary
  - 9:00 AM
    
    General Purpose Charge Readout Chip 35m
    
    Speaker: Luciano Musa (CERN)
    
    Slides
  - 9:35 AM
    
    Studies on Programmable Charge Amplifier 20m
    
    Speaker: Gerd Trampisch (CERN)
    
    Slides
  - 9:55 AM
    
    Building Blocks for FAIR FEE - goals and first results 25m
    
    Speaker: Reinhard Tielert (TU Kaiserslautern)
    
    Slides
  - 10:20 AM
    
    Low Power Pipeline ADCs 25m
    
    Speaker: David Muthers (TU Kaiserslautern)
    
    Slides
- 10:45 AM → 11:15 AM
  
  Break 30m
- 11:15 AM → 12:40 PM
  Plenary
  - 11:15 AM
    
    FEE for Nuclear Spectroscopy at FAIR 35m
    
    Speaker: Ian Lazarus (CCLRC Daresbury)
    
    Slides
  - 11:50 AM
    
    Towards a Concept: NUSTAR Slow Control 25m
    
    Speaker: Heinrich Wörtche (KVI Groningen)
    
    Slides
  - 12:15 PM
    
    Progress in RPC-FEE development 25m
    
    Speaker: Mircea Ciobanu (GSI, Darmstadt)
    
    Slides
- 12:40 PM → 2:00 PM
  
  Lunch 1h 20m
- 2:00 PM → 4:00 PM
  Plenary
  - 2:00 PM
    
    Time Distribution System 30m
    
    Speaker: Igor Konorov (TU München)
    
    Slides
  - 2:30 PM
    
    A Campus-Wide Time Synchronization System - „BuTiS“ 30m
    
    Speaker: Peter Moritz (GSI, Darmstadt)
    
    Slides
  - 3:00 PM
    
    Time measurement with differential ring oscillators 30m
    
    Speaker: Peter Fischer (Mannheim University)
    
    Slides
  - 3:30 PM
    
    A Multi Gigabit Clock and Data Recovery Testchip fabricated in 0.18µm CMOS 30m
    
    Speaker: Sitt Tontisirin (TU Kaiserslautern)
    
    Slides
- 4:00 PM → 4:30 PM
  
  Break 30m
- 4:30 PM → 6:00 PM
  Plenary
  - 4:30 PM
    
    Symbiosis of DAQ, Accelerator Settings, Diagnostics and Slow Controls at Experimental Storage Rings 30m
    
    Speaker: Christophor Kozhuharov (GSI, Darmstadt)
    
    Slides
  - 5:00 PM
    
    MUST II: large solid angle light charged particle telescope for studies with radioactive beams 30m
    
    Speaker: Emanuel Pollacco (CEA Saclay)
    
    Slides
  - 5:30 PM
    
    The VLSI/ASIC based readout technology for the spectroscopic signal processing of the UHV compatible Si multi detector system (CHICSi) 30m
    
    Speaker: Pavel Golubev (University of Lund)
    
    Slides
Thu, October 13
- 9:00 AM → 10:30 AM
  Plenary
  - 9:00 AM
    
    Front-end electronics for the PANDA pixel detectors: a custom solution in 0.13 mm? 30m
    
    Speaker: Angelo Rivetti (INFN Torino)
    
    Slides
  - 9:30 AM
    
    Front-End Electronics for DEPFET Sensors 30m
    
    Speaker: Peter Fischer (Mannheim University)
    
    Slides
  - 10:00 AM
    
    State of the Art CMOS Sensors for Charged Particle Tracking : On Signal Processing and On Chip Readout Architectures 30m
    
    Speaker: Sebastien Heini (IReS, Strasbourg, France)
    
    Slides
- 10:30 AM → 11:00 AM
  
  Break 30m
- 11:00 AM → 12:50 PM
  Plenary
  - 11:00 AM
    
    N-XYTER - The First Dedicated Neutron Detector Readout ASIC 35m
    
    Speaker: Christian Joachim Schmidt (GSI, Darmstadt)
    
    Slides
  - 11:35 AM
    
    Status and perspective of the PASA developments for the FAST-TRD for the CBM experiment 25m
    
    Speaker: Hans Kristian Soltveit (Heidelberg University)
    
    Slides
  - 12:00 PM
    
    Si-Strip FEE development for CBM 25m
    
    Speaker: Alexander Voronin (Moscow State University)
    
    Slides
  - 12:25 PM
    
    Where now for FEE in FutureDAQ and NUSTAR DAQ? 25m
    
    Speaker: Ian Lazarus (CCLRC Daresbury)
    
    Slides