Joint CBM / Panda DAQ developments - "Kick-off" meeting
19 Feb 2015, 12:30
→
20 Feb 2015, 15:00
Europe/Berlin
KBW small lecture hall (Thursday), KBW 2.27 (Friday) (GSI)
KBW small lecture hall (Thursday), KBW 2.27 (Friday)
GSI
Jan Michel
(IKF, Universität Frankfurt)
Description
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Password: daqworkshop
Phone Bridge ID: 721 5733 Password: 2811
Data Transport Minutes
Networks Minutes
Participants
Anastasios Belias
Angelo Rivetti
Cahit Ugur
Carsten Schwarz
Christian Pauly
Dirk Hutter
Grzegorz Korcyl
Jan Michel
Lars Schmitt
M Drochner
Michael Traxler
Michael Wiebusch
Milan Wagner
Myroslav Kavatsyuk
Pawel Marciniewski
Peter Schakel
Philipp Klaus
Walter F. J. Müller
Wojciech Zabolotny
Wolfgang Kühn
Thursday, 19 February
Thu, 19 Feb
Fri, 20 Feb
13:00
→
14:45
Introduction
KBW small lecture hall
KBW small lecture hall
GSI
13:00
Introduction
15m
13:15
Panda DAQ Overview
30m
Speaker
:
Wolfgang Kühn
(Univ. Giessen, II.Physikalisches Institut)
Slides
14:00
CBM DAQ Overview
20m
Speaker
:
Walter F. J. Müller
(FAIR, Darmstadt)
Slides
14:20
CBM FPGA-based sub-systems
10m
Speaker
:
Christian Pauly
(Bergische Universität Wuppertal)
Slides
14:45
→
16:55
Hardware
KBW small lecture hall
KBW small lecture hall
GSI
14:45
Hardware: Trb3 family
10m
Speaker
:
Jan Michel
(IKF, Universität Frankfurt)
Slides
15:05
Hardware: Fpga crate modules
15m
Speaker
:
Pawel Marciniewski
(Uppsala University)
Slides
15:25
Break
30m
15:55
Hardware: AFCK
20m
Speaker
:
Wojciech Zabolotny
(WUT, Warsaw)
AFCK Schematics
Slides
16:25
Discussion: Hardware Projects
30m
16:55
→
18:25
FPGA Network
KBW small lecture hall
KBW small lecture hall
GSI
16:55
SODA optical network
20m
Speaker
:
Myroslav Kavatsyuk
(KVI, University of Groningen)
Slides
17:25
FPGA Network for CBM
20m
Speaker
:
Jan Michel
(IKF, Universität Frankfurt)
Slides
17:55
Discussion: "FairNet" for both experiments?
30m
Friday, 20 February
Thu, 19 Feb
Fri, 20 Feb
09:00
→
09:55
TDC
KBW 2.27
KBW 2.27
GSI
09:00
FPGA-TDC: Status and Plans
15m
Speaker
:
Cahit Ugur
(GSI, Darmstadt)
Slides
09:25
A low-accuracy TDC?
5m
Speaker
:
Jan Michel
(IKF, Universität Frankfurt)
Slides
09:35
RICH / DIRC front-ends
10m
Speaker
:
Michael Traxler
(GSI, Darmstadt)
09:55
→
11:40
GBTx
KBW 2.27
KBW 2.27
GSI
09:55
GBT-FPGA implementation
15m
KBW 2.27
KBW 2.27
GSI
Speaker
:
Adrian Byszuk
(WUT, Warsaw)
Slides
10:15
Control of ASICS via GBTx
10m
KBW 2.27
KBW 2.27
GSI
Speaker
:
Wojciech Zabolotny
(WUT, Warsaw)
Slides
STS-XYTER protocol v. 1.16
10:30
Break
25m
KBW 2.27 (GSI)
KBW 2.27
GSI
10:55
Panda GBT
20m
KBW 2.27
KBW 2.27
GSI
Speaker
:
Matthias Drochner
(FZJ)
Slides
11:20
CBM ROB Prototype
5m
KBW 2.27
KBW 2.27
GSI
Speaker
:
Jörg Lehnert
(GSI, Darmstadt)
Slides
11:25
Discussion: GBTx
15m
KBW 2.27
KBW 2.27
GSI
11:40
→
12:30
Fast Control
KBW 2.27
KBW 2.27
GSI
11:40
Fast Control & Timing (CBM)
15m
Speaker
:
Walter F. J. Müller
(FAIR, Darmstadt)
Slides
12:00
Fast Control & Timing (Panda)
10m
Speaker
:
Myroslav Kavatsyuk
(KVI, University of Groningen)
12:15
Discussion: Fast Control / Timing
15m
12:30
→
13:30
Lunch
1h
13:30
→
14:35
Data Transport
KBW 2.27
KBW 2.27
GSI
13:30
Data & Control link via GbE
10m
Speaker
:
Grzegorz Korcyl
(Jagiellonian University)
Slides
13:50
FLES Input Interface
10m
Speaker
:
Dirk Hutter
(FIAS, Frankfurt)
Slides
14:05
Ethernet transport protocols
10m
Speaker
:
Wojciech Zabolotny
(WUT, Warsaw)
Slides
14:20
Data transport FPGA to Computer (Panda)
10m
Speaker
:
Wolfgang Kühn
(Univ. Giessen, II.Physikalisches Institut)
14:40
→
15:00
Close-Out & Further Plans
20m
KBW 2.27
KBW 2.27
GSI