PANDA DAQT and FrontEnd Electronics Workshop, Rauischholzhausen Castle

In february the tape out of the third iteration of the APFEL preamplifier and shaper ASIC took place. From early summer 200 ASICs will be available for detector tests. So from the ASIC designers point of view the development is completed. We now need to decide which tests have to be integrated into a design readyness review and how much time will be spend on these tests. After the design readyness review there are stil several upcoming steps including production, testing and assembly. The talk will give an overview of the tests foreseen to be done by our group and the upcoming steps and its time requirements. In the end the project time schedule will be discussed.