13-17 October 2014
Das Wormser
Europe/Berlin timezone

FPGA Helix tracking for PANDA (PANDA)

16 Oct 2014, 14:20
Rheinsaal (Das Wormser)


Das Wormser


Yutie Liang (U Giessen)


The PANDA detector is a general-purpose detector for physics with high luminosity cooled antiproton beams, planed to operate at the FAIR facility in Darmstadt, Germany. The central detector includes a silicon Micro Vertex Detector (MVD) and a Straw Tube Tracker (STT). Without any hardware trigger, large amounts of raw data are streaming into the data acquisition system. The data reduction task is performed in the online system by reconstruction algorithms programmed in VHDL (Very High Speed Integrated Circuit Hardware Description Language) on FPGAs (Field Programmable Gate Arrays) as first level and on a farm of GPUs or PCs as a second level. One important part in the system is the online track reconstruction. In this presentation, an online tracking finding algorithm for helix track reconstruction in the solenoidal field is shown. A performance study using C++ and the status of the VHDL implementation will be presented.

Primary author

Yutie Liang (U Giessen)

Presentation Materials