ALCOR: a SiPM readout chip for the ePIC-dRICH detector at the EIC

Sep 15, 2025, 3:50 PM
1h
Poster Technological aspects and applications of Cherenkov light detectors Poster Session

Speaker

Roberto Preghenella (INFN Sezione di Bologna)

Description

ALCOR (A Low-power Chip for Optical sensor Readout) is a mixed-signal ASIC designed for the readout of silicon photomultiplier (SiPM) sensors and developed in the framework of the ePIC dual-radiator RICH (dRICH) detector at the future Electron-Ion Collider (EIC). The current version of ALCOR integrates 32 channels, arranged in an 8×4 matrix, to provide a precise time measurement with single-photon sensitivity and a fully-digital output. Each channel features a low-impedance current conveyor input stage, based on a regulated common-gate topology, supporting both positive and negative polarity inputs. The analogue front-end offers four programmable gain settings and incorporates two discriminators with independent 6-bit DAC thresholds. Quad-buffered, low-power TDCs with analog interpolation are deployed in each channel to provide precise timestamping with a 25-50 ps time bin. The ASIC also includes time-over-threshold and slew-rate operating modes, providing an indirect measurement of signal amplitude to correct time-walk effects. Designed in 110 nm CMOS technology, ALCOR operates with less than 12 mW power consumption per channel.
ALCOR has been thoroughly tested both standalone and coupled with different SiPM models and its performance has been validated in beam tests using a dRICH prototype with a 2048 3×3 mm² SiPM readout plane. A new version of the chip (ALCOR-64), designed to meet specific EIC-driven requirements, has been sent for fabrication in April 2025. In this version, the number of channels has been extended to 64 and the chip is integrated inside a BGA package. A hardware shutter with programmable width has been implemented to filter SiPM dark-count signals that are out-of-time with respect to the 10.2 ns EIC bunch crossing period. The presentation will outline the main blocks of the ALCOR ASIC, summarize the key performance results from the chip electrical characterization and beam test campaigns, and discuss the new features implemented in the novel version for the ePIC dRICH detector.

Author

Roberto Preghenella (INFN Sezione di Bologna)

Presentation materials