Speaker
Description
The next generation of Ring Imaging Cherenkov (RICH) detectors imposes stringent requirements on photon detection technologies.
Silicon Photo-Multipliers (present on the market with different brand names, including SiPM and MPPC), offering
high photon detection efficiency ($\gtrsim 0.5$) in the near-UV,
fine granularity down to one mm pixel size,
excellent timing performance of the order of tens of ps,
extensive flexibility in the design with mechanical robustness and
relatively cheap costs,
have emerged as the solution.
However, their integration into large-scale RICH systems requires attention to dark count rate, which can be influenced by various factors such as irradiation and operating temperature. Mitigating this effect requires a combination of shielding, annealing, and cooling, with the specific approach depending on the experimental environment.
We present the design and development of a compact, integrated housing module for SiPM arrays that combines mechanical support, active thermal management, and readout electronics into a scalable autonomous unit.
Building upon the modular Elementary Cell (EC) concept adopted in the LHCb RICH Upgrade I, the new solution is tailored to meet the demanding requirements of future Cherenkov detectors.
Different active cooling strategies are being explored. The most promising approach employs a multilayer ceramic PCB substrate with embedded fluidic channels for cooling, offering excellent thermal conductivity, mechanical robustness, and high-density signal routing within a compact footprint.
We will present results from validation studies, including thermal simulations and functional tests, demonstrating the system’s ability to maintain the SiPMs at operating temperatures well below $0\,^\circ\mathrm{C}$, thereby suppressing dark count rate while preserving signal integrity.
This development represents a significant step toward the large-scale deployment of high-density, low-noise SiPM arrays in next-generation Cherenkov detectors, and provides a concrete path toward future 2.5D and 3D integration of sensors, electronics and cooling into a unified, compact architecture.
