PANDA DAQT and FrontEnd Electronics Workshop, Rauischholzhausen Castle

The PANDA detector is a general purposed hadron spectrum planed to operate at the FAIR facility in Darmstadt, Germany. The PANDA EMC detector provides almost 4pi spatial coverage, good granularity and high energy resolution. A novel self-trigger data push data architecture for the PANDA data acquisition system requiring the data from EMC readout electronics to be processed on the fly to...

An online track finder for the PANDA experiment at the future FAIR facility was developed and tested. The central Panda tracking detectors for charged particles will consist of a silicon based micro vertex detector (MVD, 5-7 hits/track) and possibly of a straw tube tracker (STT, 15 double layers of straws). Due to the solenoidal magnetic field, tracks of charged particles can be...

DIRC detectors in the PANDA experiment will give a high photon hit rate. Be it the current algorithms or new ones, they need to be adapted to run on the FFE systems and optimised for speed. And as the mechanical designs are not yet frozen, some minor changes that do not affect the detector performance may significantly ease the burden on the compute nodes.

Partial Reconfiguration (PR) offers the possibility to adaptively change part of the FPGA design without stopping the remaining system. Based on PR technology, we present a comprehensive framework for adaptive computing, in which design key points of hardware processes, system interconnections, Operating Systems (OS), device drivers, scheduler software as well as context switching are...

The use of graphics processor units (GPUs) for event reconstruction in FairRoot will be presented. CUDA (Nvidia’s Compute Unified Device Architecture) development tools are in use for few months now. New features and technologies has arrived at the market from NVIDIA itself (pinned memory) and others companies (OpenCL). In this work, the use of some of these features, pro and contras will be...