08:00
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Version control friendly project management system for FPGA designs
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Wojciech Zabolotny
(Warsaw University of Technology(WUT))
()
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08:01
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Test systems of the STS/MUCH-XYTER2 ASIC - from wafer-level to in-system verification
- Mrs
Weronika Zubrzycka
(AGH University of Science and Technology(AGH))
()
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08:02
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Tests for the Readout Chain components of the CBM STS
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Adrian Rodriguez Rodriguez
()
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