Fokus auf:  Beiträge verstecken
Einloggen

1st FAIR FEE Workshop

11.–13. Okt. 2005
GSI, Darmstadt
Europe/Berlin Zeitzone

Sitzung

Plenary

12.10.2005, 09:00
GSI, Darmstadt

GSI, Darmstadt

Präsentationsmaterialien

Es gibt derzeit keine Materialien.

  1. 10. General Purpose Charge Readout Chip
    Luciano Musa (CERN)
    12.10.05, 09:00
  2. 11. Studies on Programmable Charge Amplifier
    Gerd Trampisch (CERN)
    12.10.05, 09:35
  3. 12. Building Blocks for FAIR FEE - goals and first results
    Reinhard Tielert (TU Kaiserslautern)
    12.10.05, 09:55
  4. 13. Low Power Pipeline ADCs
    David Muthers (TU Kaiserslautern)
    12.10.05, 10:20
  5. 14. FEE for Nuclear Spectroscopy at FAIR
    Ian Lazarus (CCLRC Daresbury)
    12.10.05, 11:15
  6. 15. Towards a Concept: NUSTAR Slow Control
    Heinrich Wörtche (KVI Groningen)
    12.10.05, 11:50
  7. 16. Progress in RPC-FEE development
    Mircea Ciobanu (GSI, Darmstadt)
    12.10.05, 12:15
  8. 17. Time Distribution System
    Igor Konorov (TU München)
    12.10.05, 14:00
  9. 18. A Campus-Wide Time Synchronization System - „BuTiS“
    Peter Moritz (GSI, Darmstadt)
    12.10.05, 14:30
  10. 19. Time measurement with differential ring oscillators
    Peter Fischer (Mannheim University)
    12.10.05, 15:00
  11. 20. A Multi Gigabit Clock and Data Recovery Testchip fabricated in 0.18µm CMOS
    Sitt Tontisirin (TU Kaiserslautern)
    12.10.05, 15:30
  12. 21. Symbiosis of DAQ, Accelerator Settings, Diagnostics and Slow Controls at Experimental Storage Rings
    Christophor Kozhuharov (GSI, Darmstadt)
    12.10.05, 16:30
  13. 22. MUST II: large solid angle light charged particle telescope for studies with radioactive beams
    Emanuel Pollacco (CEA Saclay)
    12.10.05, 17:00
  14. 23. The VLSI/ASIC based readout technology for the spectroscopic signal processing of the UHV compatible Si multi detector system (CHICSi)
    Pavel Golubev (University of Lund)
    12.10.05, 17:30
Erstelle Zeitplan ...