Focus on:  Hide Contributions
Login

1st FAIR FEE Workshop

Oct 11 – 13, 2005
GSI, Darmstadt
Europe/Berlin timezone

Session

Plenary

Oct 12, 2005, 9:00 AM
GSI, Darmstadt

GSI, Darmstadt

Presentation materials

There are no materials yet.

  1. 10. General Purpose Charge Readout Chip
    Luciano Musa (CERN)
    10/12/05, 9:00 AM
  2. 11. Studies on Programmable Charge Amplifier
    Gerd Trampisch (CERN)
    10/12/05, 9:35 AM
  3. 12. Building Blocks for FAIR FEE - goals and first results
    Reinhard Tielert (TU Kaiserslautern)
    10/12/05, 9:55 AM
  4. 13. Low Power Pipeline ADCs
    David Muthers (TU Kaiserslautern)
    10/12/05, 10:20 AM
  5. 14. FEE for Nuclear Spectroscopy at FAIR
    Ian Lazarus (CCLRC Daresbury)
    10/12/05, 11:15 AM
  6. 15. Towards a Concept: NUSTAR Slow Control
    Heinrich Wörtche (KVI Groningen)
    10/12/05, 11:50 AM
  7. 16. Progress in RPC-FEE development
    Mircea Ciobanu (GSI, Darmstadt)
    10/12/05, 12:15 PM
  8. 17. Time Distribution System
    Igor Konorov (TU München)
    10/12/05, 2:00 PM
  9. 18. A Campus-Wide Time Synchronization System - „BuTiS“
    Peter Moritz (GSI, Darmstadt)
    10/12/05, 2:30 PM
  10. 19. Time measurement with differential ring oscillators
    Peter Fischer (Mannheim University)
    10/12/05, 3:00 PM
  11. 20. A Multi Gigabit Clock and Data Recovery Testchip fabricated in 0.18µm CMOS
    Sitt Tontisirin (TU Kaiserslautern)
    10/12/05, 3:30 PM
  12. 21. Symbiosis of DAQ, Accelerator Settings, Diagnostics and Slow Controls at Experimental Storage Rings
    Christophor Kozhuharov (GSI, Darmstadt)
    10/12/05, 4:30 PM
  13. 22. MUST II: large solid angle light charged particle telescope for studies with radioactive beams
    Emanuel Pollacco (CEA Saclay)
    10/12/05, 5:00 PM
  14. 23. The VLSI/ASIC based readout technology for the spectroscopic signal processing of the UHV compatible Si multi detector system (CHICSi)
    Pavel Golubev (University of Lund)
    10/12/05, 5:30 PM
Building timetable...