(very brief, details: refer to material added)
participants: ES, MT, MW, JP, CW, JM, CM
Report CM & discussion:
- check w/ PANDA/Krakov on PT full production, due early 2020! -> CM during collab meeting
- input stage options, triggered by discussion on noise =f (wire length):
- ASD8: U-div 200(serial)/500(to ground) Ohm, AC coupled to ASD8, Z = 100Ohm
- PT-1a: no serial/1MOhm to ground, Z=50Ohm (present boards)
- PT-1b: like 1a, add serial R (250Ohm), replace R 0->250Ohm)
- PT-2: instead of serial R: transformator to galv. decouple, 2 different grounds (chamber/power supply), dedicated boards prepared, check tail and amplituide-losses...
- MW reports on his SIM package, which allows to systematically study those options to prepare measurments, see talk
- "observables" to optimize: delta-t (cosmics/beam), S/N, noise: understand R-Noise compared to el. mgn pickup (can be suppressed by soike rejection, threshold, dep. on rate)
- dE/dx: relevant for PID & walk correction!
- current version-2 main board/DB and "OEP" boards: = baseline, everybody was happy with this version!
- MichaelT will have a look to the current design (not yet routed), w/o "warrenty"
- LV/Hub(if needed): JM/CM will explore options at IKF electronics lab
- SFP options: needs dedicated testboard, to check error vulnerability, as function of:
max. length of opt. cables. , temperature, data rate, placing components/functionality tests: GSI, TRB5sc design: JM, who conducts tests? project is not time critical (component can be changed late in the deign), see alos Jan's contribution during the last meeting
- LV: 3.3./1.1V (both 2A) per MB, new (old) 6.5(5)/8.8(7.5)W, to be monitored!
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