Program First FAIR FEE Workshop

Tuesday 13:00 - 14:00 - Registration

Tuesday 14:00 - 16:00

   10 min  Hans Gutbrod (GSI, Darmstadt)

   15 min  Haik Simon (GSI, Darmstadt)
           NUSTAR Overview

   15 min  Lars Schmitt (GSI, Darmstadt)
           PANDA Overview

   15 min  Walter F.J. Mueller (GSI, Darmstadt)
           CBM Overview

   20 min  Harald Deppe (GSI, Darmstadt) (presented by H. Flemming)
           DLL based TDC

   20 min  Holger Flemming (GSI, Darmstadt)
           TAC based TDC

Tuesday 16:00 - 16:30 - Coffee break

Tuesday 16:30 - 18:00

   20 min  Alexander Mann (TU München, Garching)
           Sampling ADC

   20 min  Krzysztof Korcyl (Jagiellonian University, Cracow)
           The TDC readout board

   15 min  Marek Palka (University of Cracow)
           TDC Readout Prototype: results from test measurements

   15 min  Jens Sören Lange (GSI, Darmstadt)
           The Frontend Readout System for the new HADES RPC Detector

Tuesday 18:30 - Dinner in GSI Lobby

Wednesday 9:00 - 10:30

   30 min  Luciano Musa (CERN, Geneva)
           A General Purpose Charge Readout Circuit

           Gerd Trampisch (CERN, Geneva)
           Studies on Programmable Charge Amplifier

   20 min  Reinhard Tielert (Universität Kaiserslautern)
           Building Blocks for FAIR FEE - goals and first results

   20 min  David Muthers (Universität Kaiserslautern)
           Low-Power Pipeline ADCs

Wednesday 10:30 - 11:00 - Coffee break

Wednesday 11:00 - 12:30

   30 min  Ian Lazarus (CLRC, Daresbury)
           FEE for Nuclear Spectroscopy at FAIR

   20 min  Heinrich Wörtche (RuG Groningen)
           NUSTAR slow control

   20 min  Mircea Ciobanu (GSI, Darmstadt)
           Progress in RPC-FEE development

Wednesday 12:30 - 14:00 Lunch

Wednesday 14:00 - 16:00

   20 min  Igor Konorov (TU München, Garching)
           Time Distribution System

   20 min  Peter Moritz (GSI, Darmstadt)
           A Camous-wide Frequency and Time Distribution System - BUTIS

   20 min  Peter Fischer (Universität Mannheim)
           Time measurement with differential ring oscillator

   20 min  Sitt Tontisirin (Universität Kaiserslautern)
           A Multi Gigabit Clock- and Data Recovery test
           chip fabricated in 0.18µm CMOS

Wednesday 16:00 - 16:30 - Coffee break

Wednesday 16:30 - 18:00

   25 min  Christophor Kozuharov (GSI, Darmstadt) 
           Symbiosis of DAQ, Accelerator Settings, Diagnostics and Slow 
           Controls at Experimental Storage Rings

   25 min  Emanuel Pollacco (Dapnia/SPhN, Gif-sur-Yvette/Saclay) 
           MUST II: large solid angle light charged particl
           telescope for studies with radioactive beams

   25 min  Pavel Golubev (University of Lund)
           The VLSI/ASIC based readout technology for the spectroscopic signal
           processing of the UHV compatible Si multi detector system (CHICSi)

Wednesday 18:30 - Dinner in GSI Lobby

Thursday 9:00 - 10:30

   25 min  Angelo Rivetti (INFN Torino)
           Pixel Readout Development in .13µm

   25 min  Peter Fischer (Universität Mannheim)
           Front-End Electronics for DEPFET Sensors

   25 min  Sébastien Heini (IReS, Strasbourg)
           State of the Art CMOS Sensors for Charged Particle Tracking : 
           On Signal Processing and On Chip Readout Architectures

Thursday 10:30 - 11:00 - Coffee break

Thursday 11:00 - 12:30

   30 min  Christian J. Schmidt (GSI, Darmstadt)  
           DETNI - The first dedictated neutron detector readout ASIC: 
           a purely data driven architecture for high, statistical event rate

   20 min  Hans Kristian Soltveit (Universität Heidelberg)
           Status and perspective of the PASA developments for the FAST-TRD 
           for the CBM experiment

   20 min  Alexander Voronin (SINP, Moscow State University)
           Si-strip FEE development for CBM

Thursday 12:30 - End of Workshop